The entire examples introduced so far have used the free ports (Pl and components of P3) that the "low cost" design affords. It is clear that to do a real-world design requires using additional port chips to allow several features to be interfaced to the 805 l at one time. The example program uses the intelligent LCD show, a coded 16-key keypad, and is able to serial knowledge communications. This sort of design is appropriate for a lot of applica­tions where a small, cheap, alphanumeric terminal (dubbed the ANT) is required for the manufacturing unit fl00r or the student lab. The design is proven in Figure 8.14. Port A of the 8255 is connected to the keypad. Port B provides information bytes to the LCD and the lower half of port C controls the show. This system is interrupt driven by the keypad and the serial port. I_N_T_0 is used to detect a keypress through the AND gate array whereas the serial interrupt is inside to the 8051. The serial port has the best priority. While I have been pretty busy with different issues, I managed to implement and test the VHDL for permitting keyboard enter through a easy protocol on one of the PMOD connectors on the FPGA board. Which means the PCB that we've designed for connecting an actual C64 or C65 keyboard to the FPGA board will hopefully soon work. This shall be very good. Mainly there are eight information lines on a PMOD connector, and there are 5 PMOD connectors on the Nexys4 board. We are using just one for the time being to speak to the keyboard/joystick/cartridge port board for now -- this can change later, but we just wish to get keyboard and joystick input working properly first. On that PMOD, we now have one line as clock, one other to indicate begin of sequence, after which four bits of information from the PCB to the FPGA board. The last two bits enable for a half-bandwidth back-channel to the PCB, for instance to set keyboard/diskdrive LED standing, and to set pins on the cartridge port.

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